T13: Integrated-Circuit Biasing Techniques
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| Educator |
Dr. Vincent Chang |
| Number of Lectures |
8 |
| Course Length |
15 Hours |
| Units |
1.5 CEU |
| Access Time |
30 Days |
| Course Language |
English slide with Chinese Mandarin audio |
Fee |
$100.00 |
|
| This course is intended for Chinese or Chinese American industry professionals interested in updating or refreshing their knowledge and skills in analog IC design. This course covers basic concepts, techniques and practices used for Integrated-Circuit Biasing Techniques. Topics covered include: Basic Concept of Current Source, Concept of Output Resistance, Illustration of SPICE Simulation, DC and AC analysis of Widlar Current Source, Wilson Current Mirror, MOS Cascode Current Mirror and Transconductance-Stabilized Bias Design. Students who sign up for this online course can freely learn any lecture in this course as many times as they like within the 1-month access time. |
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| Lecture |
Topic |
# of Slides |
| 1 |
Overview |
77 |
| 2 |
BJT Basic Current Mirror |
83 |
| 3 |
BJT Widlar Current Mirror |
104 |
| 4 |
BJT Wilson Current Mirror |
62 |
| 5 |
MOS Basic Current Mirror |
50 |
| 6 |
MOS Cascode Current Mirror |
76 |
| 7 |
MOS Wilson Current Mirror |
21 |
| 8 |
CMOS Gm-Stabilized Bias Design |
45 |
| 9 |
Quiz |
12 |
*Number of slides and run times are estimated
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